1. Technical Field
Various embodiments of the present invention relate to a semiconductor apparatus. In particular, certain embodiments relate to a semiconductor memory apparatus including a plurality of chips.
2. Related Art
The capacity and speed of semiconductor memories used as memory apparatuses in typical electronic systems have recently increased. Various attempts have been made to install a larger-capacity memory in a smaller area and drive the memory efficiently.
In order to improve the integration density of semiconductor memory devices, a three-dimensional (3D) arrangement technology may be used to stack a plurality of memory chips, evolving from a conventional two-dimensional (2D) arrangement technology. The trend toward high integration and high capacity of memory apparatuses requires a structure that increases the memory capacity by using a 3D arrangement structure of the memory chips and improves the integration density by reducing the semiconductor chip size.
A through-silicon via (TSV) technique may be used as such a 3D arrangement technology. The TSV technique is used as an alternative to overcome the degradation of a transmission rate according to the distance from a controller on a module, the weakness of a data bandwidth, and the degradation of a transmission rate generated according to the parameters on a package. The TSV technique creates a path penetrating a plurality of memory chips and forms an electrode in the path to conduct the communication between the controller and the plurality of chips. A TSV-based stack semiconductor memory apparatus directly connects it through a via on a controller without using wires, package subs, and package balls that are used in an SIP technique and in a POP technique. A bump is formed between the paths penetrating a plurality of memory chips, to electrically connect the controller or each memory chip.
A semiconductor memory apparatus based on a 3D arrangement technique may include a master chip and a plurality of slave chips. A plurality of slave chips may be used as memory devices, and the master chip may control the slave chips. Different chip IDs are allocated to the slave chips to select a desired slave chip. A recording operation such as fuse cutting is performed on one-time recording devices (e.g., fuses) to allocate chip IDs to the slave chips. However, fuses occupy a large area in semiconductor apparatuses, and an operation of recording a chip ID in each slave chip requires high costs (e.g., the amount of money and time).